Digital Design Using VHDL

This introductory textbook provides students with a system-level perspective and the tools they need to understand, analyze and design digital systems. Going beyond the design of simple combinational and sequential modules, it shows how such modules are used to build complete systems, reflecting real-world digital design. All the essential topics are covered, including design and analysis of combinational and sequential modules, as well as system timing and synchronization. It also teaches how to write VHDL-2008 HDL in a productive and maintainable style that enables CAD tools to do much of the tedious work. A complete introduction to digital design is given through clear explanations, extensive examples and online VHDL files. The teaching package is completed with lecture slides, labs and a solutions manual for instructors. Assuming no previous digital knowledge, this textbook is ideal for undergraduate digital design courses that will prepare students for modern digital practice.

Table of Contents

Part I Introduction

1 The digital abstraction

2 The practice of digital system design

Part II Combinational logic

3 Boolean algebra

4 CMOS logic circuits

5 Delay and power of CMOS circuits

6 Combinational logic design

7 VHDL descriptions of combinational logic

8 Combinational building blocks

9 Combinational examples

Part Ill Arithmetic circuits

10 Arithmetic circuits

11 Fixed- and floating-point numbers

12 Fast arithmetic circuits

13 Arithmetic examples

Part IV Synchronous sequential logic

14 Sequential logic

15 Timing constraints

16 Datapath sequential logic

17 Factoring finite-state machines

18 Microcode

19 Sequential examples

Part V Practical design

20 Verification and test

Part VI System design

21 System-level design

22 Interface and system-level timing

23 Pipelines

24 Interconnect

25 Memory systems

Part VII Asynchronous logic

26 Asynchronous sequential circuits

27 Flip-flops

28 Metastability and synchronization failure

29 Synchronizer design

Part VIII Appendix: VHDL coding style and syntax guide

Appendix A: VHDL coding style

Appendix B: VHDL syntax guide

About the Authors

William J. Dally is the Willard R. and Inez Kerr Bell Professor of Engineering at Stanford University and Chief Scientist at NVIDIA Corporation. He and his group have developed system architecture, network architecture, signaling, routing and synchronization technology that can be found in most large parallel computers today. He is a Member of the National Academy of Engineering, a Fellow of the IEEE, a Fellow of the ACM and a Fellow of the American Academy of Arts and Sciences. He has received numerous honors including the ACM Eckert–Mauchly Award, the IEEE Seymour Cray Award and the ACM Maurice Wilkes Award.

R. Curtis Harting is a Software Engineer at Google and holds a PhD from Stanford University. He graduated with honors in 2007 from Duke University with a BSE, majoring in Electrical and Computer Engineering and Computer Science. He received his MS in 2009 from Stanford University.

Tor M. Aamodt is an Associate Professor in the Department of Electrical and Computer Engineering at the University of British Columbia. Alongside his graduate students, he developed the GPGPU-Sim simulator. Three of his papers related to the architecture of general purpose GPUs have been selected as ‘Top Picks’ by IEEE Micro Magazine and one as a ‘Research Highlight’ by Communications of the ACM magazine. He was a Visiting Associate Professor in the Computer Science Department at Stanford University during his 2012–2013 sabbatical, and from 2004 to 2006 he worked at NVIDIA on the memory system architecture (‘framebuffer’) of the GeForce 8 Series GPU.