Circuit Design with VHDL

 completely updated and expanded comprehensive treatment of VHDL and its applications to the design and simulation of real, industry-standard circuits.

This comprehensive treatment of VHDL and its applications to the design and simulation of real, industry-standard circuits has been completely updated and expanded for the third edition. New features include all VHDL-2008 constructs, an extensive review of digital circuits, RTL analysis, and an unequaled collection of VHDL examples and exercises. The book focuses on the use of VHDL rather than solely on the language, with an emphasis on design examples and laboratory exercises.

The third edition begins with a detailed review of digital circuits (combinatorial, sequential, state machines, and FPGAs), thus providing a self-contained single reference for the teaching of digital circuit design with VHDL. In its coverage of VHDL-2008, it makes a clear distinction between VHDL for synthesis and VHDL for simulation. The text offers complete VHDL codes in examples as well as simulation results and comments. The significantly expanded examples and exercises include many not previously published, with multiple physical demonstrations meant to inspire and motivate students.

The book is suitable for undergraduate and graduate students in VHDL and digital circuit design, and can be used as a professional reference for VHDL practitioners. It can also serve as a text for digital VLSI in-house or academic courses.

Table of Contents

Chapter 1 – Review of Combinational Circuits

Chapter 2 – Review of Sequential Circuits

Chapter 3 – Review of Finite State Machines

Chapter 4 – Review of Field Programmable Gate Arrays (FPGAs)

Chapter 5 – Introduction to VHDL

Chapter 6 – Code Structure and Composition

Chapter 7 – Predefined Data Types

Chapter 8 – User-Defined Data Types

Chapter 9 – Operators and Attributes

Chapter 10 – Concurrent Code

Chapter 11 – Concurrent Code: Practice

Chapter 12 – Sequential Code

Chapter 13 – Sequential Code: Practice

Chapter 14 – Packages and Subprograms

Chapter 15 – The Case of State Machines

Chapter 16 – The Case of State Machines: Practice

Chapter 17 – Additional Design Examples

Chapter 18 – Introduction to Simulation with Testbenches

About the Author

Volnei A. Pedroni is Professor Emeritus in the Electronics Engineering Department at Brazil’s Federal University of Technology, UTFPR, and a regular Visiting Professor of Electrical Engineering at the California Institute of Technology. Dr. Pedroni’s MSc and PhD degrees are both from Caltech. He is the author of Finite State Machines in Hardware: Theory and Design (with VHDL and SystemVerilog) (MIT Press).